AMD joins low-latency CPU to GPU interconnect group founded by Intel

AMD is joining the Compute Express Link cabal, a group of companies hoping to redefine interconnect standards


AMD is joining the Compute Express Link cabal, a group of companies hoping to redefine the CPU-to-Device and CPU-to-Memory interconnect standard. The consortium, which initially began development in Intel’s labs, will see the likes of Arm, Google, Microsoft, Intel, and now AMD all pitch in together to build a high-speed interconnect built upon the foundations laid out by PCIe 5.0.

The CXL interconnect aims to bring your CPU and GPU (or other system device) closer together with a low-overhead highway. The goal is to accelerate computational workloads, namely artificial intelligence, deep learning, cloud computing, and major number crunching, which is increasingly seeing the use of a CPU and any number of GPUs working as one on a range of complex workloads.

“Since 2016 AMD has played a leadership role in driving three other new bus/interconnect standards, CCIX, OpenCAPI and Gen-Z,” Mark Papermaster, CTO of AMD, says in a blog post. “Like CXL, these three efforts are driven by the need to create tighter coupling and coherency between processors and accelerators, and better exploit new and emerging memory/storage technologies in open, standards-based solutions.

“While these different groups have been working to solve similar problems, each approach has its differences. As a long-standing supporter of open standards, we’re excited to join CXL and the possibilities presented as we work with other ecosystem leaders to address challenges we face as an industry.”

CXL further improves on memory coherency between a CPU and any attached GPU, FPGA, or accelerator. Essentially, it streamlines resource sharing between devices and reduces the necessary overhead required for cross-processor communication and cooperation, and will utilise the electrical traces to be implemented with the PCIe 5.0 standard.

PCIe 4.0 was only recently introduced in the client market with AMD’s Ryzen 3000 processors. Yet this is expected (knock on wood) to be swiftly surpassed by the PCIe 5.0 spec.

Asus ROG Crosshair VIII Hero (Wi-Fi) PCIe

The tech will be available to all within the CXL consortium as an industry open standard. It’s not the only interconnect out there, with the cache coherent CCIX and Gen-Z standards also taking on the same battle. Yet the specification, which was initially developed by Intel, has now gained unrivalled support. AMD’s involvement in CXL further cements the specifications strong position in the market, with its reach spanning key players across the entire industry.

Nvidia’s latest and largest acquisition, Mellanox, is also a member of the consortium. Yet its new owner is notably absent, perhaps due to its similarly aligned NVLink interconnect.

“CXL is an important milestone for data-centric computing, and will be a foundational standard for an open, dynamic accelerator ecosystem,” Jim Pappas, director of technology initiatives at Intel, says. “Like USB and PCI Express, which Intel also co-founded, we can look forward to a new wave of industry innovation and customer value delivered through the CXL standard.”

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