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Intel Alder Lake big/small CPUs are either fake or a whole new strategy

Intel LGA 1700 Alder Lake socket

Intel Alder Lake CPUs are rumoured to feature up to 16 cores – but not as you might expect. According to a slide posted to ptt.cc, and said to reflect Intel’s intentions, the chipmaker may be looking into heterogeneous core designs featuring a mix of ‘big’ and ‘small’ cores, high-performance and low-power respectively, for future desktop processors.

The rumours all stem from a single slide claimed to be snipped from an internal Intel presentation. Granted, it’s not much to go on. But what if Intel really did decide to follow ARM’s lead into big.LITTLE architectures? Would this finally be a viable alternative to AMD’s chiplet architecture introduced last year with Zen 2?

It’s at least worth exploring the possibility of a heterogeneous Alder Lake architecture, even if said slide could be a red herring. Heterogeneous computing is a rare thing in desktop computing, only AMD’s Zen 2 processors currently deal in a mix of 7nm and 12nm processors, and the benefits of big.LITTLE architectures are largely only felt in mobile and low-power applications.

Alder Lake is the name currently given to the architecture, or mixed-architecture generation, of CPU set to be introduced sometime around 2022. If what we know of it so far comes to pass, it will mark the first time the 10nm process node is introduced on desktop and will ship on a new socket: LGA 1700. It will likely follow on from Intel Comet Lake and Rocket Lake CPUs set to release later this year and into 2021.

The recent slides from user Sharkbay (spotted by Momomo_US and Ghost_motley on Twitter, via VideoCardz) suggest Alder Lake-S CPUs will be equipped with up to 16-cores, eight “big core” and eight “small core”. It’s been suggested that these will be made up of Golden Cove Core cores (yeah, I know) and Gracemont Atom cores. This would be in line with Intel’s own CPU roadmap from 2019.

If true, Intel Alder Lake would effectively mimic a heterogeneous core setup known as big.LITTLE over in Arm computing, all the while utilising the x86 instruction set.

That’s not a trivial change either. While potentially offering a low-power alternative, whose benefit in the desktop CPU game is up for debate, it would require some serious software work throughout the entire firmware/driver/OS stack to get up-and-running. Not the least bit on Microsoft’s part to get Windows capable of spotting and utilising these big/small cores effectively.

Perhaps there’s some hope. Intel is already working on Lakefield, a 3D-stacked ‘Foveros’ processor built on the 10nm process node. The chip is a collaboration between Intel and Microsoft, a result of its long-standing Surface relationship (forget about that AMD surface for a moment). The chip itself is a five-core, five-thread processor with four small Tremont Atom cores and one big Sunny Cove core.

Intel Core roadmap

So there’s a potential precursor for Intel’s big core, little core solution, and one which may help it iron out the kinks. Does that mean it’s happening? No Siree! Not one bit. Does it mean these big/small processors, if extant, will be somehow able to match a similarly 8- or even 10-core desktop processor with Hyperthreading enabled? Who can say, but it theoretically sounds dubious at best.

So perhaps that’s why we’re a little skeptical as why Intel would go for such an approach on desktop, and by extension this whole ‘leak’. Mobile, sure. But desktop? Some of the best CPUs for gaming are already up in the 125W TDP range, so what’s a little power-saving to do. Not to mention that these specifications for Alder Lake will supposedly see it hit a grand total of 150W TDP – so much for advanced process nodes shedding power demands… or big.LITTLE for that matter.

However, if it turns out Alder Lake really is Intel’s first whack at heterogeneous computing on desktop, and its first attempt to roll out its many interconnect technologies at scale, then there’s got to be good reason for it. There’s no way Intel would cram a heap of Atom cores in a chip just for the arbitrary claim of matching AMD core-for-core. Right?

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