Intel is previewing its upcoming Lakefield mobile processors in a new YouTube clip. This will be the first Intel chip to sport the new Foveros packaging technology, and will definitely DEFINITELY have 10nm silicon inside. And production is happening this year. Or is expected to. Probably. Almost definitely.
The recently uploaded video highlights the new design features of the Lakefield processor, and promises it will drive a whole new wave of “highly mobile devices” in incredibly thin and light form factors, with unprecedented power efficiency. The chip stacking technology is going to enable entire system-on-a-chip (SoC) designs that are smaller than a postage stamp. Sorry, that’s a rather archaic reference now… smaller than the nail on your index finger. People still have those, right?
Like the upcoming AMD Ryzen 3000 processors, the Lakefield setup is predicated on the use of chiplets to power the SoC. The Intel design, however, is stacking its processor using the Foveros packaging tech, so the GPU and CPU chiplets sit atop the I/O slice instead of being seated alongside it on the die, with the system memory layered on top of the lot.
This allows Intel to create this 12mm2 SoC, which will in turn allow it to build efficient designs and power a new generation of bastard laptops; half tablet, half e-reader, and half traditional PC laptop. Fractions are tough…
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“We expect this technology,” says the smooth-voiced Intel narrator, “to unleash a wave of platform innovation industry wide, creating entirely new classes of highly mobile device and helping to advance PC innovation by bringing new experiences to life.”
The devices this new video highlights – the types of skinny laptops that make the MacBook Air look like a device that needs to be winched out of the house in front of stunned neighbours in some sort of body-shaming Netflix documentary – are exactly what Intel needs to be creating to keep relevant in the face of the increasing power of Qualcomm chips and the ARM revolution over at Apple.
Indeed, the Lakefield core layout is very reminiscent of the big.LITTLE design pioneered by ARM. Intel is pairing a single 10nm Sunny Cove core (the cores which will eventually power Ice Lake processors) with four lower-spec 10nm cores to make an asymmetrical five-core setup. The big Sunny Cove core would take care of the more intensive, battery straining tasks, while the LITTLE cores would look after everything else.
The whole Intel Lakefield approach is also feeding into its Project Athena initiative. This represents the work it’s doing with its partners in order to create 11-inch machines, and the like, which are ultra-responsive and super-efficient. And Foveros and Lakefield are key to all of this.