Nvidia finally signs up to Intel-founded CPU to GPU interconnect group alongside AMD

Nvidia HQ

Nvidia has joined the CXL Consortium, joining the likes of AMD and founders Intel in a cross-party menagerie of tech companies working together to create the next generation of high-speed CPU-to-Device and CPU-to-Memory interconnect: Compute Express Link.

The project initially began in Intel’s labs, although has since expanded its remit to include companies such as Arm, Google, Microsoft, and, most recently, AMD. The red team joined the consortium’s ranks less than a month ago, and it now seems the green team can’t resist the lure of this widely agree upon high-speed specification (via David Schor).

It wasn’t always a done deal for Nvidia, however. The company has been pushing its own interconnect technologies, NVLink for one, for quite some time. This isn’t exactly the same as concept as CXL, but it does share some common properties that may have seen Nvidia trying to go it alone in the interconnect space going forward. It also looked like Nvidia’s record-breaking $6.9bn acquisition of Mellanox, a big data networking technology company, would strengthen its solo efforts.

But Mellanox is also a member of the consortium, and the CXL group has only been going from strength to strength with every new major industry player that joins. It seems eventually the pressure grew too great for Nvidia to ignore any longer.

And what will Nvidia get out of this consortium? Well, access to the ‘industry open’ CXL specification for one, which is only available to those that sign up.

The spec will increase speed between a CPU and another device – namely GPUs, accelerators, and FPGAs – or memory pool, and intends to streamline the communication between each device for low-latency cooperation. The plan is to build around the electrical interface soon to be implemented with PCIe 5.0.

The consumer market has only recently made the change to PCIe 4.0, following the introduction alongside AMD Ryzen 3000 processors. However, the latest standards, such as PCIe 5.0, are likely to receive swifter implementations in the demanding big data world.

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