Intel’s new 48-core Xeon CPU apes AMD’s ‘glued together’ EPYC chips

Intel Xeon Scalable processors

Intel has announced Cascade Lake advanced performance, a brand new class of server CPU based on its existing 14nm process. The first Xeon processors under the Cascade Lake umbrella will launch in the first half of 2019 with one major selling point: they will offer more cores than ever thanks to multiple discrete ‘glued’ together dies – just like AMD’s EPYC processors.

Back when AMD first launched EPYC, a supposed internal slide from Intel was leaked that claimed AMD’s server chips were delivering inconsistent performance due to their “4 glued together desktop die”. It was a little stab at AMD’s Infinity Fabric, the interconnect mesh that allows for multiple discrete processing dies to communicate and function together.

That same dig at AMD never made it into the press slides for Cascade Lake, and for obvious reason. Intel’s current generation Xeon processors – the aptly-named Xeon Scalable – rely on a single die stuffed to the brim with cores. The current top chip is the Xeon Platinum 8180, a 28-core, $10,000 processor utilising a single, fully-functional XCC die package.

But Intel may have given in to AMD’s scalable solution with Cascade Lake. Intel is offering up to 48 cores per chip with the upcoming generation, made possible by a multi-chip module ostensibly not conceptually dissimilar to AMD’s EPYC chips. The superglue approach will likely see Intel pairing two 24-core packages together utilising a high speed interconnect.

AMD Infinity Fabric

While Intel’s ‘glued together’ phrasing might initially have sounded unnecessarily derogatory, the term is sometimes used when specifically talking about technical interconnects, and not always negatively.

And Intel already has quite a bit of experience with interconnect technology. The company utilises mesh interconnects within current Xeon lines to reduce latency between physical cores, Ultrapath Interconnect technology to meld two discrete server CPUs together, and its embedded multi-die interconnect bridge implemented back with Kaby Lake G. This technology bridged the gap between AMD’s Radeon Vega GPU and HBM2 memory on the hybrid chip.

AMD’s EPYC processors are available with up to 32 cores of processing grunt. These chips are reportedly in fashion right now as Intel struggles to meet its clients needs due to 14nm shortages.

Intel Wafer

Cascade Lake is to be built upon the 14nm node, as were the last few generations of Intel server processors. This is largely due to a slowdown in development of its 10nm process – a severely delayed node not expected to arrive until the end of 2019. This has significantly stifled not just product advancement over the last few years, but, more recently, supply, too.

HP Enterprise, one of the world’s preeminent server companies, reportedly began recommending AMD EPYC chips in lieu of Intel’s Xeon processors. Intel’s third quarter financials indicate the company has since stabilised, or at least floated, the supply constraints, but AMD’s still looking strong in the data centre market after years of Intel dominance.

Intel’s Cascade Lake processors will be available sometime next year, and the top chip almost certainly costing upwards of $10,000. For the time being Intel is introducing the entry-level Intel Xeon E-2100, a lowly hexacore part. Meanwhile, AMD is potentially only one day away from announcing the full details of its 7nm EPYC ‘Rome’ chips.